The present invention relates in general to integrated circuits, and in particular to electronic devices using pulse width modulation (xe2x80x9cPWMxe2x80x9d) techniques.
Pulse width modulation is a common circuit technique whereby information is carried by varying the width of the pulse in a periodic signal. A typical circuit application for PWM signals is in the control of switching regulators. Switching regulators, which are also called switch-mode regulators, are employed in power supply design where high power and high efficiency are important. With PWM controlled regulators, the frequency is held constant and the width of each pulse is varied to form a fixed-frequency, variable-duty cycle operation. The output of the PWM circuitry is used to control the switching of one or more pass transistors with very small internal resistance.
A conventional circuit using PWM techniques in switching regulator is shown in FIG. 1. In operation, the comparator evaluates a predetermined reference ramp signal Vramp against a feedback error voltage signal, Verr, to control the output through a latch (e.g., S-R flip flop), the latch operating as what is known in the art as a noise or multiple pulse suppresser. It should be understood that multiple pulsing is used interchangeably with double pulsing. When Vramp greater than Verr, the comparator switches the output off and thus controls one edge of the latch output as shown in FIG. 2. The control of the other edge of the latch output (i.e., turn-on) is performed using a fixed-frequency system clock (e.g., Syst. Clock). As a result, the PWM Out signal is not affected by the inadvertent application of spurious multiple pulses to the flip-flop set input.
Although the above-described configuration effectively generates a pulse width modulated signal for switching regulators, it has its disadvantages. For example, to achieve large duty cycles (e.g., 90% or more) for proper operation of the switching regulator, this scheme employs a sawtooth waveform as a Vramp signal. Vramp is generated by an oscillator synchronized with the system clock to produce such a sawtooth waveform of FIG. 2.
As switching frequencies increase in systems using PWM, however, the maximum duty cycle of the design is limited to less than a 100% duty cycle capability. At higher frequencies, the conventional PWM signal generation circuit becomes limited by the rate of the discharge slope of the sawtooth ramp generator (not shown). Thus, a pulse width xe2x80x9cW,xe2x80x9d as depicted in FIG. 2, is an unusable portion of the duty cycle that restricts the operation range (i.e., less than 100%) of the PWM output. Hence, the conventional approach is frequency limited and is thus inadequate for system applications where higher frequencies are employed.
Therefore, there is a need in the art for an inventive circuit and method for suppressing transient noise effects on the device output resulting in multiple pulses, while achieving a 100% duty cycle.
The present invention provides an improved pulse width modulator for high speed circuits such as switching regulator circuitry. The pulse width modulator according to the present invention employs a triangular wave oscillator system and provides multiple pulse suppression for proper system operation at high frequencies over a full duty cycle range (i.e., up to 100%). Furthermore, the modulator includes automatic self-correcting circuits to prevent the output from becoming stuck in an error state (i.e., fault condition) for more than half of the switching frequency cycle. Accordingly, in one embodiment, the present invention provides a pulse width modulator for use in, for example, DC-to-DC switching regulation circuitry, the pulse width modulator includes a comparator coupled to receive a control signal and a reference ramp signal and is configured to generate a pulse width control signal. The pulse width modulator also includes a noise suppression circuit coupled to receive a periodic signal and to an output of the comparator and configured to further provide a pulse width modulated signal. Transitions of the periodic signal coincide with either a maximum or a minimum amplitude of the ramp signal. Furthermore, the control signal is a feedback error voltage control signal and the reference ramp signal is a fixed frequency triangular reference ramp.
In another embodiment of the pulse width modulator, the noise suppression circuit further comprises a set logic path having a first set input coupled to the comparator output to receive the pulse width control signal and a second set input coupled to receive a periodic signal and a set output, a reset logic path having a first reset input coupled to receive a periodic signal and a second reset input coupled to receive the pulse width control signal and a reset output, and a set-reset circuit latch having a first input coupled to the set output and a second input coupled to the reset output and a set-reset circuit output, wherein the set-reset circuit output is configured to provide the pulse width modulated signal.
The present invention also provides a method of generating a pulse width modulated signal comprising generating a reference ramp signal, comparing the reference ramp signal to a control signal, generating a pulse width control signal upon a pre-determined event as a result of comparing the reference ramp signal to a control signal, and generating one leading edge and one trailing edge of the pulse width modulated signal for each cycle of the periodic signal based upon the pulse width control signal and a periodic signal, wherein the leading edge and the trailing edge are generated by a noise suppression circuit.
A better understanding of the nature and advantages of the present invention may be had with reference to the detailed description and drawings below.